7.62 An alternative equivalent circuit of an amplifier fed with a signal source (vsig, Rsig) and connected to a load RL is shown in Fig. P7.62. Here Gv o is the open-circuit overall voltage gain and R out is the output resistance with vsig set to zero. This is different than R o. Show that G v o = R i R i +Rsig A v o where R i = Rin R L =∞ . Also show that the overall voltage gain is

62 9 - 7.62 An alternative equivalent circuit of an amplifier fed with a signal source (vsig, Rsig) and connected to a load RL is shown in Fig. P7.62. Here Gv o is the open-circuit overall voltage gain and R out is the output resistance with vsig set to zero. This is different than R o. Show that G v o = R i R i +Rsig A v o where R i = Rin R L =∞ . Also show that the overall voltage gain is

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images - 7.62 An alternative equivalent circuit of an amplifier fed with a signal source (vsig, Rsig) and connected to a load RL is shown in Fig. P7.62. Here Gv o is the open-circuit overall voltage gain and R out is the output resistance with vsig set to zero. This is different than R o. Show that G v o = R i R i +Rsig A v o where R i = Rin R L =∞ . Also show that the overall voltage gain is

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