7.72 A CS amplifier using an NMOS transistor with gm = 2 mA/V is found to have an overall voltage gain of −10 V/V. What value should a resistance R s inserted in the source lead have to reduce the overall voltage gain to −5 V/V?

72 10 - 7.72 A CS amplifier using an NMOS transistor with gm = 2 mA/V is found to have an overall voltage gain of −10 V/V. What value should a resistance R s inserted in the source lead have to reduce the overall voltage gain to −5 V/V?

This content is for Premium members only.
sign up for premium and access unlimited solutions for a month at just 5$(not renewed automatically)


images - 7.72 A CS amplifier using an NMOS transistor with gm = 2 mA/V is found to have an overall voltage gain of −10 V/V. What value should a resistance R s inserted in the source lead have to reduce the overall voltage gain to −5 V/V?

already a member please login


10   +   9   =