7.9 Figure P7.9 shows an amplifier in which the load resistor R D has been replaced with another NMOS transistor Q2 connected as a two-terminal device. Note that because v DG of Q2 is zero, it will be operating in saturation at all times, even when v I = 0 and iD2 = iD1 = 0. Note also that the two transistors conduct equal drain currents. Using iD1 = iD2, show thatfor therange of vI over which Q1 is operating in saturation, that is, for

9 13 - 7.9 Figure P7.9 shows an amplifier in which the load resistor R D has been replaced with another NMOS transistor Q2 connected as a two-terminal device. Note that because v DG of Q2 is zero, it will be operating in saturation at all times, even when v I = 0 and iD2 = iD1 = 0. Note also that the two transistors conduct equal drain currents. Using iD1 = iD2, show thatfor therange of vI over which Q1 is operating in saturation, that is, for

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images - 7.9 Figure P7.9 shows an amplifier in which the load resistor R D has been replaced with another NMOS transistor Q2 connected as a two-terminal device. Note that because v DG of Q2 is zero, it will be operating in saturation at all times, even when v I = 0 and iD2 = iD1 = 0. Note also that the two transistors conduct equal drain currents. Using iD1 = iD2, show thatfor therange of vI over which Q1 is operating in saturation, that is, for

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