7.95 An NMOS transistor is connected in the bias circuit of Fig. 7.48(c), with VG = 5 V and RS = 3 k. The transistor has V t = 1 V and kn = 2 mA/V2. What bias current results? If a transistor for which k n is 50% higher is used, what is the resulting percentage increase in ID?

95 7 - 7.95 An NMOS transistor is connected in the bias circuit of Fig. 7.48(c), with VG = 5 V and RS = 3 k. The transistor has V t = 1 V and kn = 2 mA/V2. What bias current results? If a transistor for which k n is 50% higher is used, what is the resulting percentage increase in ID?

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images - 7.95 An NMOS transistor is connected in the bias circuit of Fig. 7.48(c), with VG = 5 V and RS = 3 k. The transistor has V t = 1 V and kn = 2 mA/V2. What bias current results? If a transistor for which k n is 50% higher is used, what is the resulting percentage increase in ID?

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