7.98 Design the circuit in Fig. P7.98 so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region, with ID = 1 mA and VD = 3 V, for each of the following two devices (use a 10-μA current in the voltage divider): (a) Vt = 1 V and kp W/L = 0.5 mA/V2 (b) Vt = 2 V and kp W/L = 1.25 mA/V2 For each case, specify the values of VG, VD, VS, R1, R2, RS, and R D

98 6 - 7.98 Design the circuit in Fig. P7.98 so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region, with ID = 1 mA and VD = 3 V, for each of the following two devices (use a 10-μA current in the voltage divider): (a)  Vt  = 1 V and kp W/L = 0.5 mA/V2 (b)  Vt  = 2 V and kp W/L = 1.25 mA/V2 For each case, specify the values of VG, VD, VS, R1, R2, RS, and R D

This content is for Premium members only.
sign up for premium and access unlimited solutions for a month at just 5$(not renewed automatically)


images - 7.98 Design the circuit in Fig. P7.98 so that the transistor operates in saturation with VD biased 1 V from the edge of the triode region, with ID = 1 mA and VD = 3 V, for each of the following two devices (use a 10-μA current in the voltage divider): (a)  Vt  = 1 V and kp W/L = 0.5 mA/V2 (b)  Vt  = 2 V and kp W/L = 1.25 mA/V2 For each case, specify the values of VG, VD, VS, R1, R2, RS, and R D

already a member please login


10   +   5   =