8.88 Consider the Wilson MOS mirror of Fig. 8.41(a) for the case of all transistors identical, with W/L = 10, μnCox = 400 μA/V2, Vtn = 0.5 V, and VA = 18 V. The mirror is fed with I REF = 180 μA. (a) Obtain an estimate of VOV and VGS at which the three transistors are operating, by neglecting the Early effect. (b) Noting that Q1 and Q2 are operating at different VDS, obtain an approximate value for the difference in their currents and hence determine I O. (c) To eliminate the systematic error between IO and IREF caused by the difference in VDS between Q1 and Q2, a diode-connected transistor Q4 can be added to the circuit

8.88 - 8.88 Consider the Wilson MOS mirror of Fig. 8.41(a) for the case of all transistors identical, with W/L = 10, μnCox = 400 μA/V2, Vtn = 0.5 V, and VA = 18 V. The mirror is fed with I REF = 180 μA. (a) Obtain an estimate of VOV and VGS at which the three transistors are operating, by neglecting the Early effect. (b) Noting that Q1 and Q2 are operating at different VDS, obtain an approximate value for the difference in their currents and hence determine I O. (c) To eliminate the systematic error between IO and IREF caused by the difference in VDS between Q1 and Q2, a diode-connected transistor Q4 can be added to the circuit

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images - 8.88 Consider the Wilson MOS mirror of Fig. 8.41(a) for the case of all transistors identical, with W/L = 10, μnCox = 400 μA/V2, Vtn = 0.5 V, and VA = 18 V. The mirror is fed with I REF = 180 μA. (a) Obtain an estimate of VOV and VGS at which the three transistors are operating, by neglecting the Early effect. (b) Noting that Q1 and Q2 are operating at different VDS, obtain an approximate value for the difference in their currents and hence determine I O. (c) To eliminate the systematic error between IO and IREF caused by the difference in VDS between Q1 and Q2, a diode-connected transistor Q4 can be added to the circuit

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