D 8.41 The circuit in Fig. 8.15(a) is fabricated in a 0.18-μm CMOS technology for which μnCox = 400 μA/V2, μpCox = 100 μA/V2, Vtn = −Vtp = 0.5 V, VAn = 5 V/μm,  VAp   = 5 V/μm, and VDD = 1.8 V. It is required to design the circuit to obtain a voltage gain Av = −40 V/V. Use devices of equal length L operating at I = 100 μA and  VOV  = 0.25 V. Determine the required values of VG, L, (W/L)1, and (W/L)2.

8.41 - D 8.41 The circuit in Fig. 8.15(a) is fabricated in a 0.18-μm CMOS technology for which μnCox = 400 μA/V2, μpCox = 100 μA/V2, Vtn = −Vtp = 0.5 V, VAn  = 5 V/μm,  VAp    = 5 V/μm, and VDD = 1.8 V. It is required to design the circuit to obtain a voltage gain Av = −40 V/V. Use devices of equal length L operating at I = 100 μA and  VOV  = 0.25 V. Determine the required values of VG, L, (W/L)1, and (W/L)2.

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images - D 8.41 The circuit in Fig. 8.15(a) is fabricated in a 0.18-μm CMOS technology for which μnCox = 400 μA/V2, μpCox = 100 μA/V2, Vtn = −Vtp = 0.5 V, VAn  = 5 V/μm,  VAp    = 5 V/μm, and VDD = 1.8 V. It is required to design the circuit to obtain a voltage gain Av = −40 V/V. Use devices of equal length L operating at I = 100 μA and  VOV  = 0.25 V. Determine the required values of VG, L, (W/L)1, and (W/L)2.

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