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1.25. if Vin = 12v and Vo =9v, calculate the maximum energy-efficiency expected of a linear regulator where the excess input voltage is dropped across a transistor, that functions as a controllable resistor, and is placed in series between the input and the output.
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4.46 The EC pairQ,-Q, of Fig. P4.46 utilizes the emit- ter followers Q-Q, to lower the currents drawn from the sources vn and v and thus raise the ac input resistances R, and Ra seen by the same sources. Let Vcr–vE =6V,Ro=Ra= 10 kfl, R,-R,-15 kf2. and IEE = 1 mA. More. over, assume van-van 0.7 V and β,-100 for all BJTs. (a) Find the base currents / and I,, and the col- lector voltages Vo and V at dc balance. (b) If vn- v, and v 0, obtain expressions for Ya, v.21%, and 1,4 in terms of v,- Hint: exploit the symmetry of the circuit. (c) Obtain expressions for v and v. in terms of vi. Hence, assuming = oo, find the gain (d) Again exploiting circuit symmetry, find the input resistances R, and Ra (e) What is the upper limit on vl for which the condition 1%) 5 mVis met by all BJTs? Rc2 CI + VOD 02 Qi 02 FIGURE P4.46
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4.49 We wish to design a SC pair of the type of Fig. P4.47 so that when driven with vn – (0.2 V) cos ot and v^-0 it produces the largest possible output signal under the constraint that neither FET ever leave the saturation region. The available com ponents are VDp – -Vss 5 V and RDl -Rp2- 10 kQ, and the FET’s have k’ 0.4 V, λ 0, and γ-0 100 μΑΛ, V, (a) Assuming Rss-00, and supposing we wish to satisfy Eq. (4.94) by an order of magnitude, or AVO,-10 × (0.2 V), what is the required Iss? What are the required W/L ratios for the FETs? Hint: increasing Iss to raise a will also lower Vo1 and Vo2 and bring the FETs closer to satu- ration. The most critical instants are when vaj and v, reach their negative peaks. (b) What is the ensuing gain a? What are the total signals (sum of de and ac components) von Vo2, and vn? OD
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A circuit conducting loop lies in the xy-plane as shown. The loop has a radius of 0.3 m and resistance R = 2 ohm. If B = 12 cos(omega t + phi) a_z mT. where omega = 254 rad/s and phi = 77 degree. Find the current (with respect to the angle from the x-axis, phi-direction) in the circuit at time, t = 28 ms.
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A voltage amplifier has an input resistance of 5 k omega, an output resistance of 50 omega, and a nominal (open-circuit) voltage gain of 1000. The amplifier is connected to a source with an internal voltage of Vs = 20mV and a series resistance of Rs 250 omega. The load resistance is RL 200 omega. The open-circuit (i.e load disconnected) voltage gain A = Vo/Vs is closest to: 1000 950 750 500
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An ideal transformer has 200 turns in its primary winding and 40 turns in its secondary winding. Its Primary Voltage is 550 V. If the load connected on the secondary side has an impedance of 4.2 ohms. Determine: A) the secondary voltage B) the current in the secondary C) the current in the primary
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Consider an LTI system with impulse response h(t) h(t) = sin(4(t -1))/pi(t – 1) Determine the output of the system for each of the following inputs: x_1(t) = cos(6t + pi/2) x_2(t) = sigma_k = 0^infinity (1/2)^k sin(3kt) x_3(t) = sin(4(t + 1))/pi(t + 1) x_4(t) = (sin(2t)/pi t)^2
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DC biasing design. In the following four-resistor biasing circuit, it is required to have a drain current of I_D = 1.6 mA, V_DS = 6 V and V_s = 4 V. The current in the gate voltage supplier (a voltage divider for 15 V) is 30 mu A. The MOSFET used has a threshold voltage of V_t = 1V and geometrical parameter of k_n (W/L) = 0.2 mA/V^2. Design R_G1i, R_G2 and R_s to satisfy the biasing requirements.
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Design a Wilder current source with a 100 mu A. Reference current to achieve a current transfer ratio of 0.5 assuming beta is infinity
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Design the MOS differential amplifier in Fig.6.29 (see below) to operate at V_GS -V_t = 0.2 V and to provide a transconductance g_ of 1m/A/V. Specify the WL ratios and the bias current. The technology available provides V_r = 0.8 V and mu_n C_ = 90 mu A/V^2
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Determine the Fourier transform of each of the following signals: x(t) = 1/1 + t^2 Phi (t – 3) + Phi (t + 3) 4 Phi (t/4) cos(2 phi f_0 t) t sinct t cos 2 phi f_0 t
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